- Keisuke Sugiura, Hiroki Matsutani. FPGA-accelerated Correspondence-free Point Cloud Registration with PointNet Features. TRETS, 18(2), June 2025.
- Mustafa Ibrahim, Sébastien Pillement, Andréa Pinna 0001, Sébastien Le Nours. VERSATILE: Very Fast Partial Reconfiguration Controller. TRETS, 18(3), September 2025.
- Giovanni Brignone, Roberto Bosio, Fabrizio Ottati, Claudio Sansoè, Luciano Lavagno. SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-specific LLVM Passes for Compute-Intensive FPGA Accelerators. TRETS, 18(2), June 2025.
- Wenjie Zhou, Haoyan Qi, David Boland, Philip H. W. Leong. FPGA-based Block Minifloat Training Accelerator for a Time Series Prediction Network. TRETS, 18(2), June 2025.
- Mohamed A. Elgammal, Amin Mohaghegh, Soheil Gholami Shahrouz, Fatemehsadat Mahmoudi, Fahrican Kosar, Kimia Talaei, Joshua Fife, Daniel Khadivi, Kevin E. Murray, Andrew Boutros, Kenneth B. Kent, Jeffrey B. Goeders, Vaughn Betz. VTR 9: Open-Source CAD for Fabric and Beyond FPGA Architecture Exploration. TRETS, 18(3), September 2025.
- Gaurav Singh, Kia Bazargan. Compressing Neural Networks using Learnable 1D Non-Linear Functions. TRETS, 18(2), June 2025.
- Qilin Hu, Haotian Wang 0006, Chubo Liu, Keqin Li 0001, Kenli Li 0001. HiFA: A High-Performance and Flexible Acceleration Framework for Large-Size Number Theoretic Transform. TRETS, 18(4), December 2025.
- Vaughn Betz. Editorial: A Message from the New Editor-in-Chief. TRETS, 18(3), September 2025.
- Akhil Raj Baranwal, Zhenman Fang. Consumer Buffer Support. TRETS, 18(4), December 2025.
- Zhenman Fang. Introduction to the Special Issue on RAW 2024. TRETS, 18(3), September 2025.