5 | -- | 25 | Paolo Ienne, Thierry Cornu, Gary Kuhn. Special-purpose digital hardware for neural networks: An architectural survey |
27 | -- | 35 | Konstantinos I. Diamantaras, W. H. Chou, S. Y. Kung. Dynamic programming implementation on array processor architectures |
37 | -- | 56 | Michael Sheliga, Edwin Hsing-Mean Sha. Hardware/Software co-design with the HMS framework |
57 | -- | 66 | Ding-Ming Kwai, Behrooz Parhami. FFT computation with linear processor arrays using a data-driven control scheme |
67 | -- | 75 | Manjit Borah, Chetana Nagendra, Mohan Vishwanath, Robert Michael Owens, Mary Jane Irwin. An optimal time multiplication free algorithm for edge detection on a mesh |