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    Journal: VLSI Signal Processing

    Volume 17, Issue 1

    5 -- 20Jürgen Teich, Lothar Thiele, Lee Z. Zhang. Partitioning Processor Arrays under Resource Constraints
    21 -- 41Karl-Heinz Zimmermann. A Unifying Lattice-Based Approach for the Partitioning of Systolic Arrays via LPGS and LSGP
    43 -- 55Konstantinos I. Diamantaras, S. Y. Kung. A Linear Systolic Array for Real-Time Morphological Image Processing
    57 -- 73Montserrat Bóo, Francisco Argüello, Javier D. Bruguera, Emilio L. Zapata. Mapping of Trellises Associated with General Encoders onto High-Performance VLSI Architectures
    75 -- 92David A. Parker, Keshab K. Parhi. Low-Area/Power Parallel FIR Digital Filter Implementations
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