Journal: VLSI Signal Processing

Volume 32, Issue 3

207 -- 222Javier Valls, Martin Kuhlmann, Keshab K. Parhi. Evaluation of CORDIC Algorithms for FPGA Design
223 -- 235Kiamal Z. Pekmestzi, Nikos K. Moshopoulos. A Systolic, High Speed Architecture for an RSA Cryptosystem
237 -- 254J. M. Pierre Langlois, Dhamin Al-Khalili, Robert J. Inkol. Polyphase Filter Approach for High Performance, FPGA-Based Quadrature Demodulation
255 -- 273María A. Trenas, Juan López, Emilio L. Zapata, Francisco Argüello. A Configurable Architecture for the Wavelet Packet Transform
275 -- 286Peter F. M. Smulders, M. F. H. de Gier. Modelling ARQ for a High-Speed ATM-Based Wireless LAN