Journal: VLSI Signal Processing

Volume 38, Issue 2

91 -- 100Maria J. Avedillo, José M. Quintana, Hamid El Alami, Antonio Jiménez-Calderón. A Practical Parallel Architecture for Stacks Filters
101 -- 113Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang. Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization
115 -- 130Konstantinos Sarrigeorgidis, Jan M. Rabaey. Ultra Low Power CORDIC Processor for Wireless Communication Algorithms
131 -- 146Shuvra S. Bhattacharyya, Praveen K. Murthy. The CBP Parameter: A Module Characterization Approach for DSP Software Optimization
147 -- 156Jaemin Kim, Seongwon Cho, Jinsu Choi, Robert J. Marks. Iris Recognition Using Wavelet Features
173 -- 199Jarno K. Tanskanen, Jarkko Niittylahti. Scalable Parallel Memory Architectures for Video Coding