| 195 | -- | 212 | Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers. IEEE-Compliant IDCT on FPGA-Augmented TriMedia |
| 213 | -- | 235 | Alireza Shoa, Shahram Shirani. Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey |
| 237 | -- | 247 | Tsung-Nan Lin, Joseph Shu. Adaptive-Hierarchical-Filtering Technique for High-Quality Magazine Image Reproduction |
| 249 | -- | 266 | Mahmoud Meribout, Mamoru Nakanishi. A New Real Time Object Segmentation and Tracking Algorithm and its Parallel Hardware Architecture |
| 267 | -- | 271 | Yih-Chyun Jenq. Digital Signal Processing with Interleaved ADC Systems |
| 273 | -- | 293 | Timothy W. O Neil, Edwin Hsing-Mean Sha. Combining Extended Retiming and Unfolding for Rate-Optimal Graph Transformation |
| 295 | -- | 311 | Miriam Leeser, Srdjan Coric, Eric Miller, Haiqian Yu, Marc Trepanier. Parallel-Beam Backprojection: An FPGA Implementation Optimized for Medical Imaging |
| 313 | -- | 322 | Paraskevas Kalivas, Vassilis Vassilakis, Chris Meletis, Kiamal Z. Pekmestzi. A New Low Latency Parallel FIR Filter Scheme |
| 323 | -- | 331 | Nigel Boston. Pipelined IIR Filter Architecture Using Pole-Radius Minimization |