Journal: VLSI Signal Processing

Volume 4, Issue 1

7 -- 25Miguel Valero-García, Juan J. Navarro, José María Llabería, Mateo Valero, Tomás Lang. A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units
27 -- 36Philippe Clauss, Catherine Mongenet, Guy-René Perrin. Calculus of space-optimal mappings of systolic algorithms on processor arrays
37 -- 51G. Jack Lipovski. A four megabit Dynamic Systolic Associative Memory chip
53 -- 68C. F. T. Tang, K. J. Ray Liu, S. F. Hsieh, Kung Yao. VLSI algorithms and architectures for complex householder transformation with applications to array processing
69 -- 88Jean-Marc Delosme. Bit-level systolic algorithms for real symmetric and Hermitian eigenvalue problems
89 -- 0Christian Lengauer, Jingling Xue. A systolic array for pyramidal algorithms