Journal: VLSI Signal Processing

Volume 52, Issue 1

1 -- 11Robert T. Grisamore, Earl E. Swartzlander Jr.. Negative Save Sign Extension for Multi-term Adders and Multipliers
13 -- 34Hyunuk Jung, Hoeseok Yang, Soonhoi Ha. Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis
35 -- 44F. Angarita, Ma José Canet, T. Sansaloni, Javier Valls, Vicenc Almenar-Terre. Architectures for the Implementation of a OFDM-WLAN Viterbi Decoder
45 -- 57Albert Mo Kim Cheng, Yan Wang. A Dynamic Voltage Scaling Algorithm for Dynamic Workloads
59 -- 73Yen-Liang Chen, Ming-Feng Hsu, Jyh-Ting Lai, An-Yeu Wu. Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme
75 -- 94Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Peter Nilsson, Viktor Öwall. An Embedded Real-Time Surveillance System: Implementation and Evaluation
95 -- 109Yanmei Qu, Shunliang Mei, Yun He. A Cost-effective VLD Architecture for MPEG-2 and AVS