Journal: VLSI Signal Processing

Volume 7, Issue 3

189 -- 197John S. Fernando, Milos D. Ercegovac. Conventional and on-line arithmetic designs for high-speed recursive digital filters
199 -- 211Poornachandra B. Rao, Alexander Skavantzos. ROM based methods for computing the squaring operation in modular rings
213 -- 222Vojin G. Oklobdzija, David Villeger, Thierry Soulas. An integrated multiplier for complex numbers
223 -- 232Robert F. Jones, Earl E. Swartzlander Jr.. Parallel counter implementation
233 -- 248Fabian Klass, Michael J. Flynn, A. J. van de Goor. Fast multiplication in VLSI using wave pipelining techniques
249 -- 257Ben C. Drerup, Earl E. Swartzlander Jr.. Fast multiplier bit-product matrix reduction using bit-ordering and parity generation
259 -- 270Paolo Montuschi, Luigi Ciminiera. Radix-8 division with over-redundant digit set
271 -- 285Marianne E. Louie, Milos D. Ercegovac. Implementing division with field programmable gate arrays