Journal: VLSI Signal Processing

Volume 70, Issue 2

87 -- 89Mohammad M. Mansour, Magdy A. Bayoumi, Brian L. Evans. Editorial
91 -- 104Tarek A. Elarabi, Randa Ayoubi, Hanan A. Mahmoud, Magdy A. Bayoumi. Efficient 45nm ASIC Architecture for Full-Search Free Intra Prediction in Real-Time H.264/AVC Decoder
105 -- 123Eduardo Romero-Aguirre, Roberto Carrasco-Alvarez, Ramon Parra-Michel, Aldo G. Orozco-Lugo, Antonio F. Mondragón-Torres. Full-Hardware Architectures for Data-Dependent Superimposed Training Channel Estimation
125 -- 143Esther P. Adeva, Tobias Seifert, Gerhard Fettweis. VLSI Architecture for MIMO Soft-Input Soft-Output Sphere Detection
145 -- 162Lifeng Miao, Stefanos Michael, Narayan Kovvali, Chaitali Chakrabarti, Antonia Papandreou-Suppappola. Multi-source Neural Activity Estimation and Sensor Scheduling: Algorithms and Hardware Implementation
163 -- 175Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti. Hardware Acceleration for Neuromorphic Vision Algorithms
177 -- 191George F. Zaki, William Plishker, Shuvra S. Bhattacharyya, Charles Clancy, John Kuykendall. Integration of Dataflow-Based Heterogeneous Multiprocessor Scheduling Techniques in GNU Radio
193 -- 208Faisal Hamady, Ayman I. Kayssi, Ali Chehab, Mohammad Mansour. Evaluation of Low-Power Computing when Operating on Subsets of Multicore Processors
209 -- 218Mohammad M. Mansour. A Hardware-Efficient Algorithm for Real-Time Computation of Zadoff-Chu Sequences
219 -- 234Mrugesh R. Gajjar, T. V. Sreenivas, R. Govindarajan. Fast Likelihood Computation in Speech Recognition using Matrices
235 -- 247Junhee Cho, Wonyong Sung. Soft-Decision Error Correction of NAND Flash Memory with a Turbo Product Code