| 269 | -- | 270 | Peeter Ellervee, Jari Nurmi. Guest Editorial: Implementation Issues in System-on-Chip |
| 271 | -- | 286 | Feriel Ben Abdallah, Chiraz Trabelsi, Rabie Ben Atitallah, Mourad Abed. Model-Driven Approach for Early Power-Aware Design Space Exploration of Embedded Systems |
| 287 | -- | 297 | Waqar Hussain, Henry Hoffmann, Tapani Ahonen, Jari Nurmi. Power Mitigation by Performance Equalization in a Heterogeneous Reconfigurable Multicore Architecture |
| 299 | -- | 325 | Martin Broich, Tobias G. Noll. Optimal Datapath Widths Within Turbo and Viterbi Decoders for High Area- and Energy-Efficiency |
| 327 | -- | 341 | Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung 0001, Norbert Wehn. A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture |
| 343 | -- | 356 | Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický. Design of a Residue Number System Based Linear System Solver in Hardware |
| 357 | -- | 369 | Christoforos Kachris, Dionysios Diamantopoulos, Georgios Ch. Sirakoulis, Dimitrios Soudris. An FPGA-based Integrated MapReduce Accelerator Platform |
| 371 | -- | 381 | Elena Dubrova, Mats Näslund, Gunnar Carlsson, John Fornehed, Ben J. M. Smeets. Two Countermeasures Against Hardware Trojans Exploiting Non-Zero Aliasing Probability of BIST |