Journal: VLSI Signal Processing

Volume 93, Issue 5

461 -- 462Christian Hochberger, Brent Nelson. Special Issue on Applied Reconfigurable Computing
463 -- 479Dennis Wolf 0001, Andreas Engel 0003, Tajas Ruschke, Andreas Koch 0001, Christian Hochberger. UltraSynth: Insights of a CGRA Integration into a Control Engineering Environment
481 -- 498Marcin Kowalczyk, Piotr Ciarach, Dominika Przewlocka-Rus, Hubert Szolc, Tomasz Kryjak. Real-Time FPGA Implementation of Parallel Connected Component Labelling for a 4K Video Stream
499 -- 512Masayuki Shimoda, Youki Sada, Hiroki Nakahara. FPGA-Based Inter-layer Pipelined Accelerators for Filter-Wise Weight-Balanced Sparse Fully Convolutional Networks with Overlapped Tiling
513 -- 529Lester Kalms, Pedram Amini Rad, Muhammad Ali, Arsany Iskander, Diana Göhringer. A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs
531 -- 544Mário P. Véstias. Efficient Design of Pruned Convolutional Neural Networks on FPGA
545 -- 563Carsten Heinz, Jaco A. Hofmann, Jens Korinth, Lukas Sommer, Lukas Weber, Andreas Koch 0001. The TaPaSCo Open-Source Toolflow
565 -- 586Johan Peltenburg, Jeroen van Straten, Matthijs Brobbel, Zaid Al-Ars, H. Peter Hofstee. Generating High-Performance FPGA Accelerator Designs for Big Data Analytics with Fletcher and Apache Arrow
587 -- 602Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis. Evaluation of Static Mapping for Dynamic Space-Shared Multi-task Processing on FPGAs