Defect Tolerant Majority Voter Design Using Triple Transistor Redundancy

Atin Mukherjee 0001, Anindya Sundar Dhar. Defect Tolerant Majority Voter Design Using Triple Transistor Redundancy. In IEEE International Symposium on Smart Electronic Systems, iSES 2019 (Formerly iNiS), Rourkela, India, December 16-18, 2019. pages 63-68, IEEE, 2019. [doi]

Abstract

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