A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio

Dong Wei 0008, Tianxiang Wu, Shunli Ma, Yong Chen 0005, Junyan Ren. A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio. In 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021. pages 195-198, IEEE, 2021. [doi]

@inproceedings{0008WMCR21,
  title = {A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio},
  author = {Dong Wei 0008 and Tianxiang Wu and Shunli Ma and Yong Chen 0005 and Junyan Ren},
  year = {2021},
  doi = {10.1109/ESSCIRC53450.2021.9567743},
  url = {https://doi.org/10.1109/ESSCIRC53450.2021.9567743},
  researchr = {https://researchr.org/publication/0008WMCR21},
  cites = {0},
  citedby = {0},
  pages = {195-198},
  booktitle = {47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-3751-6},
}