Table of Contents

• Artificial Intelligence: Why moving it to the Edge?Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin. 1-6 [doi]
• Overcoming the Data Deluge Challenges with Greener ElectronicsJ.-R. Léquepeys, Marc Duranton, S. Bonnetier, S. Catrou, R. Fournel, T. Ernst, L. Hérault, D. Louis, A. Jerraya, Alexandre Valentian, F. Perruchot, Thomas Signamarcheix, Elisa Vianello, Carlo Reita. 7-14 [doi]
• Architecting the Human IntranetJan M. Rabaey, Ana Claudia Arias, Rikky Muller. 15-20 [doi]
• Digital PLLs: the modern timing reference for radar and communication systemsCarlo Samori, Luca Bertulessi. 21-27 [doi]
• Wideband and Low-Power Delta-Sigma ADCs: State of the Art, Trends and Implementation ExamplesMaurits Ortmanns. 28-35 [doi]
• The Power of Parallelism in Stochastic Search for Global Optimum: Keynote PaperAli Sheikholeslami. 36-42 [doi]
• Compact Modelling of 22nm FDSOI CMOS Semiconductor Quantum Dot Cryogenic I-V CharacteristicsS. Pati Tripathi, S. Bonen, C. Nastase, S. Iordanescu, G. Boldeiu, M. Pasteanu, A. Müller, S. P. Voinigescu. 43-46 [doi]
• Bias Generation and Calibration of CMOS Charge Qubits at 3.5 Kelvin in 22-nm FDSOIImran Bashir, Dirk Leipold, Mike Asker, Ali Esmailiyan, Elena Blokhina, David Redmond, Panagiotis Giounanlis, Dennis Andrade-Miceli, Robert Bogdan Staszewski. 47-50 [doi]
• Electronic-Photonic Cryogenic Egress LinkBozhi Yin, Hayk Gevorgyan, Deniz Onural, Anatol Khilo, Milos A. Popovic, Vladimir Marko Stojanovic. 51-54 [doi]
• Performance Trade-Off Scenarios for GAA Nanosheet FETs Considering Inner-spacers and Epi-induced Stress: Understanding & Mitigating Process RisksAmita Rawat, Krishna K. Bhuwalka, Philippe Matagne, Bjorn Vermeersch, Hao Wu, Geert Hellings, Julien Ryckaert, Changze Liu. 55-58 [doi]
• Electric-field controlled spin transport in bilayer CrI3Damiano Marian, David Soriano, Enrique G. Marin, Giuseppe Iannaccone, Gianluca Fiori. 59-62 [doi]
• Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout CircuitryB. Gys, F. A. Mohiyaddin, R. Acharya, R. Li, Kristiaan De Greve, Georges G. E. Gielen, Bogdan Govoreanu, Iuliana P. Radu, Francky Catthoor. 63-66 [doi]
• Cryogenic Characterization and Modeling of 14 nm Bulk FinFET TechnologyAsma Chabane, Mridula Prathapan, Peter Mueller, Eunjung Cha, Pier Andrea Francese, Marcel A. Kossel, Thomas Morf, Cezar Zota. 67-70 [doi]
• Cryogenic Characterization of 16 nm FinFET Technology for Quantum ComputingHung-Chi Han, Farzan Jazaeri, Antonio A. D'Amico, Andrea Baschirotto, Edoardo Charbon, Christian C. Enz. 71-74 [doi]
• A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and AreaPeter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma. 75-78 [doi]
• A 40nm RRAM Compute-in-Memory Macro Featuring On-Chip Write-Verify and Offset-Cancelling ADC ReferencesWantong Li, Xiaoyu Sun, Hongwu Jiang, Shanshi Huang, Shimeng Yu. 79-82 [doi]
• Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM BridgesM. Ezzadeen, A. Majumdar, Marc Bocquet, Bastien Giraud, Jean-Philippe Noël, François Andrieu, Damien Querlioz, Jean Michel Portal. 83-86 [doi]
• High-Conductance, Ohmic-like HfZrO4 Ferroelectric MemristorLaura Bégon-Lours, Mattia Halter, Youri Popoff, Zhenming Yu, Donato Francesco Falcone, Bert Jan Offrein. 87-90 [doi]
• Emulating artificial mechanoreceptor functionalities from SiO2-based memristor and PDMS stretchable sensor for artificial skin applicationsPanagiotis Bousoulas, Ch. Papakonstantinopoulos, D. Tsoukalas. 91-94 [doi]
• A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDPMing Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, K. T. C. Chai, Anh-Tuan Do. 95-98 [doi]
• AAD-KWS: a sub-µW keyword spotting chip with a zero-cost, acoustic activity detector from a 170nW MFCC feature extractor in 28nm CMOSLixuan Zhu, Weiwei Shan, Jiaming Xu, Yicheng Lu. 99-102 [doi]
• 7.5nJ/inference CMOS Echo State Network for Coronary Heart Disease predictionSanjeev Tannirkulam Chandrasekaran, Imon Banerjee, Arindam Sanyal. 103-106 [doi]
• A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOSYu-Tung Liu, Chuking Kung, Ming-Hang Hsieh, Hsiu-Wen Wang, Chun-Pin Lin, Chao-Yang Yu, Chi-Shi Chen, Tzi-Dar Chiueh. 107-110 [doi]
• A 43pJ per Inference CBNN-based Compute-in-sensor Associative Memory in 28nm FDSOIBenoit Larras, Antoine Frappé. 111-114 [doi]
• A Calibration-Free In-Memory True Random Number Generator Using Voltage-Controlled MRAMJiyue Yang, Di Wu 0045, Albert Lee, Seyed Armin Razavi, Puneet Gupta, Kang L. Wang, Sudhakar Pamarti. 115-118 [doi]
• Exploiting FeFET Switching Stochasticity for Low-Power Reconfigurable Physical Unclonable FunctionXinrui Guo, Xiaoyang Ma, Franz Müller, Ricardo Olivo, Juejian Wu, Kai Ni 0006, Thomas Kämpfe, Yongpan Liu, Huazhong Yang, Xueqing Li. 119-122 [doi]
• A Charge-Domain Computation-In-Memory Macro with Versatile All-Around-Wire-Capacitor for Variable-Precision Computation and Array-Embedded DA/AD ConversionsGicheol Shin, Donguk Seo, Jaerok Kim, Johnny Rhe, Eunyoung Lee, Seonho Kim, Soyoun Jeong, Jong Hwan Ko, Yoonmyung Lee. 123-126 [doi]
• 2 and 749-1, 459 TOPS/W in 28nmViveka Konandur Rajanna, Sachin Taneja, Massimo Alioto. 127-130 [doi]
• A Zero-Skipping Reconfigurable SRAM In-Memory Computing Macro with Binary-Searching ADCChengshuo Yu, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim. 131-134 [doi]
• 4.6µm Low Power Indirect Time-of-Flight Pixel Achieving 88.5% Demodulation Contrast at 200MHz for 0.54MPix Depth CameraCédric Tubert, Pascal Mellot, Yann Desprez, Celine Mas, Arnaud Authié, Laurent Simony, Grégory Bochet, Stephane Drouard, Jeremie Teyssier, Damien Miclo, Jean-Raphael Bezal, Thibault Augey, Franck Hingant, Thomas Bouchet, Blandine Roig, Aurélien Mazard, Raoul Vergara, Gabriel Mugny, Arnaud Tournier, Frédéric Lalanne, François Roy, Boris Rodrigues Goncalves, Matteo Vignetti, Pascal Fonteneau, Vincent Farys, François Agut, Joao Miguel Melo Santos, David Hadden, Kevin Channon, Christopher Townsend, Bruce Rae, Sara Pellegrini. 135-138 [doi]
• Advancements in indirect Time of Flight image sensors in front side illuminated CMOSMarkus Dielacher, Martin Flatscher, Reinhard Gabl, Richard Gaggl, Dirk Offenberg, Jens Prima. 139-142 [doi]
• Dark Count Rate in Single-Photon Avalanche Diodes: Characterization and Modeling studyMathieu Sicre, Megan Agnew, Christel Buj, Jean Coignus, Dominique Golanski, Rémi Helleboid, Bastien Mamdy, Isobel Nicholson, Sara Pellegrini, Denis Rideau, David Roy 0001, Francis Calmon. 143-146 [doi]
• A high-speed low-power sun sensor with solar cells and continuous operationRuben Gomez-Merchan, M. López-Carmona, Juan Antonio Leñero-Bardallo, Ángel Rodríguez-Vázquez. 147-150 [doi]
• A 0.94-µVrms Input Noise Pixel-Level Continuous Time ΣΔ IADC Interface for THz SensingGabriele Quarta, Matteo Perenzoni, Stefano D'Amico. 151-154 [doi]
• An Energy Autonomous Light Intensity Sensor for Monarch Butterfly Migration TrackingYuyang Li, Yejoong Kim, Eunseong Moon, Yuxin Gao, Jamie Phillips, Inhee Lee. 155-158 [doi]
• 2f Power ConsumptionJonas Pelgrims, Kris Myny, Wim Dehaene. 159-162 [doi]
• A Pitch-Matched Analog Front-End with Continuous Time-Gain Compensation for High-Density Ultrasound Transducer ArraysP. Guo, Z. Y. Chang, Emile Noothout, Hendrik J. Vos, Johannes G. Bosch, N. de Jong, Martin D. Verweij, Michiel A. P. Pertijs. 163-166 [doi]
• A 96-channel 40nm CMOS Fully-Integrated Potentiostat for Electrochemical MonitoringPeishuo Li, Tom R. Molderez, Marian Verhelst. 167-170 [doi]
• 2 0.31 V/0.39 V 28 nW/144 nW 65 nm CMOS Solar Cell-Powered Biofuel Cell-Input Biosensing System with PIM/PDM LED Driving for Stand-Alone RF-Less Continuous Glucose Monitoring Contact LensGuowei Chen, XinYang Yu, Yue Wang, Tran Minh Quan, Naofumi Matsuyama, Takuya Tsujimura, Md. Zahidul Islam, Kiichi Niitsu. 171-174 [doi]
• Wafer-scale fabrication of biologically sensitive Si nanowire FET: from pH sensing to electrical detection of DNA hybridizationR. Midahuen, Bernard Previtali, C. Fontelaye, G. Nonglaton, Sylvain Barraud, V. Stambouli. 175-178 [doi]
• Design and Fabrication of a Ring-Coupled Mach-Zehnder Interferometer GyroscopeEva Kempf, Pierre Labeye, Philippe Grosse, Frédéric Boeuf, Stéphane Monfray, Paul G. Charette, Régis Orobtchouk. 179-182 [doi]
• High Tuning Range Spiking 1R-1T VO2 Voltage-Controlled Oscillator for Integrated RF and Optical SensingTeodor Rosca, Fatemeh Qaderi, Adrian Mihai Ionescu. 183-186 [doi]
• A 4-31GHz Direct-Conversion Receiver Employing Frequency-Translated FeedbackJacob Dean, Sandeep Hari, Avinash Bhat, Brian A. Floyd. 187-190 [doi]
• A Low Power, 3.5-20GHz Tunable LNA with Out-Of-Band Blocker Filtering Based on Compact, Tunable Transmission Line (CTTL) Resonators in 65nm CMOSThomas Tapen, Alyssa Apsel. 191-194 [doi]
• A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New RadioDong Wei 0008, Tianxiang Wu, Shunli Ma, Yong Chen 0005, Junyan Ren. 195-198 [doi]
• A 38.5-to-60.5 GHz LNA with Wideband Combiner Supporting Cartesian Beamforming ArchitectureRehman Akbar, Rana Azhar Shaheen, Timo Rahkonen, Cheung Tze, Kari Stadius, Aarno Pärssinen. 199-202 [doi]
• A 17 mW 33 dBm IB-OIP3 0.5-1.5 GHz Bandwidth TIA Based on an Inductor-Stabilized OTANimesh Nadishka Miral, Danilo Manstretta, Rinaldo Castello. 203-206 [doi]
• A 47.5MHz BW 4.7mW 67dB SNDR Ringamp Based Discrete-Time Delta Sigma ADCLucas Moura Santana, Ewout Martens, Jorge Lagos, Benjamin P. Hershberg, Piet Wambacq, Jan Craninckx. 207-210 [doi]
• A 93.1-dB SFDR, 90.3-dB DR, and 1-MS/s CT Incremental Sigma-Delta Modulator Incorporating a Resistive Dual-RTZ FIR DACAyman Sakr, Mohamed Atef Hassan, Jens Anders. 211-214 [doi]
• A Dual-Mode Second-Order Oversampling Analog-to-Digital ConverterAbhijeet Taralkar, Francesco Conzatti, Piero Malcovati, Andrea Baschirotto. 215-218 [doi]
• A 0.6-to-1.2 V Scaling Friendly Discrete-Time OTA-Free ΔΣ-ADC for IoT ApplicationsKyung-Chan An, Neelakantan Narasimman, Tony Tae-Hyoung Kim. 219-222 [doi]
• An 800-mA Time-Based Boost Converter in 0.18µm BCD with Right-Half-Plane Zero Elimination and 96% Power EfficiencyMauro Leoncini, Alessandro Bertolini, Alessandro Gasparini, Salvatore Levantino, Massimo Ghioni. 223-226 [doi]
• A 40.68MHz Active Rectifier with Cycle-Based On/Off-Delay Compensation for Biomedical ImplantsZiyang Luo, Hoi Lee. 227-230 [doi]
• An integrated Boost Controller with MPPT for Submodule PV ApplicationsMichael Hanhart, Leo Rolff, Léon Weihs, Jan Grobe, Jonas Zoche, Ralf Wunderlich, Stefan Heinen. 231-234 [doi]
• A Stacked-Photovoltaic-Cell Energy Harvester with >81% Indoor Light Harvesting Efficiency for Millimeter-Scale Energy-Autonomous Sensor NodesYuyang Li, Eunseong Moon, Jamie Phillips, Inhee Lee. 235-238 [doi]
• Multi-Code Multi-Rate Universal Maximum Likelihood Decoder using GRANDArslan Riaz, Vaibhav Bansal, Amit Solomon, Wei An, Qijun Liu, Kevin Galligan, Ken R. Duffy, Muriel Médard, Rabia Tugce Yazicigil. 239-246 [doi]
• 2 9.98 Gb/s 39.7 pJ/b 32-Antenna All-Digital Spatial Equalizer for mmWave Massive MU-MIMO in 65nm CMOSOscar Castañeda, Zachariah Boynton, Seyed Hadi Mirfarshbafan, Shimin Huang, Jamie C. Ye, Alyosha C. Molnar, Christoph Studer. 247-250 [doi]
• Scalable Digital Synchronizer for Enabling Hardware-Level BLE Mesh Networks under 1 mWIvan Bukreyev, Ken Ho, Alyssa Apsel. 251-254 [doi]
• Dual-Input Pseudo-CMOS Logic for Digital Applications on Flexible SubstratesHikmet Çeliker, Wim Dehaene, Kris Myny. 255-258 [doi]
• 2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFETAbraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt 0001, John Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic. 259-262 [doi]
• A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature RangeThomas Benz, Luca Bertaccini, Florian Zaruba, Fabian Schuiki, Frank K. Gürkaynak, Luca Benini. 263-266 [doi]
• A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution ModeAngelo Garofalo, Gianmarco Ottavi, Alfio Di Mauro, Francesco Conti 0001, Giuseppe Tagliavini, Luca Benini, Davide Rossi. 267-270 [doi]
• Circuit Monitoring Across Design Life-Cycle in 28nm FD-SOI and 40nm Bulk CMOS technologiesSylvain Clerc, Kedar Janardan Dhori, Robin M. Wilson, Rohit Goel, Sébastien Marchal, Franck Pourchon, Christian Dutto, Ricardo Gomez Gomez. 271-274 [doi]
• Toward 6G: From New Hardware Design to Wireless Semantic and Goal-Oriented Communication ParadigmsEmilio Calvanese Strinati, Didier Belot, Alexis Falempin, Jean-Baptiste Doré. 275-282 [doi]
• A 22-31 GHz Bidirectional 5G Transceiver Front-End in 28 nm CMOSD. Manente, Fabio Quadrelli, Fabio Padovan, Matteo Bassi, Andrea Mazzanti, Andrea Bevilacqua. 283-286 [doi]
• A 4-Element 800MHz-BW 29mW True-Time-Delay Spatial Signal Processor Enabling Fast Beam-Training with Data CommunicationsChung-Ching Lin, Chase Puglisi, Erfan Ghaderi, Soumen Mohapatra, Deukhyoun Heo, Subhanshu Gupta, Han Yan, Veljko Boljanovic, Danijela Cabric. 287-290 [doi]
• A 60 GHz QDCO with 11 GHz Seamless Tuning for Low-Power FMCW Radars in 22-nm FDSOIFrancesco Chicco, Sammy Cerida Rengifo, Erwan Le Roux, Christian C. Enz. 291-294 [doi]
• A 55-63 GHz fundamental Quad-Core VCO with NMOS-only stacked oscillator in 28 nm CMOSSriram Balamurali, Giovanni Mangraviti, Cheng-Hsueh Tsai, Piet Wambacq, Jan Craninckx. 295-298 [doi]
• A 253-280 GHz Wide Tuning Range VCO with -3.5 dBm Peak Output Power in 40-nm CMOSSurajit Kumar Nath, Junghwan Yoo, Jae-Sung Rieh, Daekeun Yoon. 299-302 [doi]
• A 19 GHz Circular-Geometry Quad-Core Tail-Filtering Class-F VCO with -115 dBc/Hz Phase Noise at 1 MHz Offset in 65-nm CMOSShuxin Ming, Jin Zhou. 303-306 [doi]
• A Periodically Time-Varying Inductor Applied to The Class-D VCO for Phase Noise ImprovementJun Yin 0001, Pui-In Mak, Rui Paulo Martins. 307-310 [doi]
• A Pre-Charge Tracking Technique in the 40MHz High-switching 48-to-5V DC-DC Buck Converter with GaN Switches for Reducing Large Self-commutation Loss and Achieving a High Efficiency of 95.4%Tzu-Hsien Yang, Chun-Kai Chiu, Yong-Hwa Wen, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 311-314 [doi]
• A Load-Current-Regulating OLED Lamp Driver Using a Hybrid Step-Up Converter with 93.21% Efficiency at a High Conversion Ratio of 4.1Donghee Cho, Hongseok Shin, Hyunwoo Park, Sein Oh, Taeju Lee, Sohmyung Ha, Chul Kim, Minkyu Je. 315-318 [doi]
• 2, 95.4%-Efficiency, CP-Length Tracking Switching Supply Modulator for 5G New Radio mmWave PA ArraysMin Kyu Song, Dong Yan, Dongsheng Brian Ma. 319-322 [doi]
• A 100-MHz 81.2% All-Paths Inductor-Connected Buck-Converter with Balanced Conduction-Losses and Continuous Path-CurrentsJoo-Mi Cho, Hyo-Jin Park, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong. 323-326 [doi]
• A 0.1 MHz to 200 MHz high-voltage CMOS transceiver for portable NMR systems with a maximum output current of 2.0 AppHeiko Bürkle, Tobias Klotz, Reiner Krapf, Jens Anders. 327-330 [doi]
• A readout circuit for tunnel magnetoresistive sensors employing an ultra-low-noise current sourceAyman Mohamed, Hadi Heidari, Jens Anders. 331-334 [doi]
• A Charge-Rotating IIR Filter with Linear Interpolation and High Stop-Band RejectionAmir Bozorg, Robert Bogdan Staszewski. 335-338 [doi]
• 309-µW 40-MHz 20-dB-Gain Analog Filter in 28nm-CMOSMarcello De Matteis, Andrea Baschirotto, Elia Arturo Vallicelli. 339-342 [doi]
• A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total AccuracyLuigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto. 343-346 [doi]
• 6 Dynamic Range Featuring Fast DVFS and Asynchronous Load-Transient ControlXinjian Liu, Shuo Li 0008, Benton H. Calhoun. 347-350 [doi]
• A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling FrequencyJooeun Bang, Seojin Choi, Seyeon Yoo, Jeonghyun Lee, Juyeop Kim, Jaehyouk Choi. 351-354 [doi]
• A Switched-Capacitor DC-DC Converter with >77.3% Efficiency and 80 ns Active Transient Response in 40 µA - 4 mA Load Current RangeYi Tan, Hiroki Ishikuro. 355-358 [doi]
• An Inverter-Based, Ultra-Low Power, Fully Integrated, Switched-Capacitor DC-DC Buck ConverterEdi Emanovic, Joseph Shor, Drazen Jurisic. 359-362 [doi]
• Fully integrated reflector-based analog predistortion for Ku-band Power Amplifiers LinearizationNathalie Deltimple, Potereau Manuel, Ghiotto Anthony. 363-368 [doi]
• A 239-298 GHz Power Amplifier in an Advanced 130 nm SiGe BiCMOS Technology for Communications ApplicationsThomas Bücher, Janusz Grzyb, Philipp Hillger, Holger Rücker, Bernd Heinemann, Ullrich R. Pfeiffer. 369-372 [doi]
• 2 13.3 dB gain sub-6 GHz to 28 GHz transformer-coupled low-voltage upconversion mixer for 5G applicationsOner Hanay, Renato Negra. 373-376 [doi]
• A 28-GHz Switched-Filter Phase Shifter with Fine Phase-Tuning Capability Using Back-Gate Biasing in 22-nm FD-SOI CMOSEnis Kobal, Teerachot Siriburanon, Robert Bogdan Staszewski, AnDing Zhu. 377-380 [doi]
• A Tutorial on Systematic Design of CMOS A/D Converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBWTetsuya Iizuka, Hao Xu 0005, Asad A. Abidi. 381-386 [doi]
• An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error ShapingHanyue Li, Yuting Shen, Haoming Xin, Eugenio Cantatore, Pieter Harpe. 387-390 [doi]
• A 9.08 ENOB 10b 400MS/s Subranging SAR ADC with Subsetted CDAC and PDAS in 40nm CMOSQiang Yu, Xiong Zhou, Kefeng Hu, Zijian Huang, Haiwen Chen, Xin Si, Jinda Yang, Qiang Li. 391-394 [doi]
• A -109.1 dB/-98 dB THD/THD+N Chopper Class-D Amplifier with >83.7 dB PSRR Over the Entire Audio BandHuajun Zhang, Nuriel Rozsa, Marco Berkhout, Qinwen Fan. 395-398 [doi]
• A 18 µA Rail-to-Rail Class-AB Operational Amplifier with a High-Slew Miller Compensation (HSMC) Technique with 240% Settling Time Reduction in 0.18 µmHyo-Jin Park, Joo-Mi Cho, Hyunji Choi, Esun Baik, Jeeyoung Shin, Sung-Wan Hong. 399-402 [doi]
• A 440-kOhm to 150-GOhm Tunable Transimpedance Amplifier based on Multi-Element Pseudo-ResistorsDenis Djekic, Matthias Häberle, Ayman Mohamed, Lars Baumgärtner, Jens Anders. 403-406 [doi]
• An a-IGZO TFT based Op-Amp with 57 dB DC-Gain, 311 KHz Unity-gain Freq., 75 deg. Phase Margin and 2.43 mW Power on Flexible SubstrateMohit Dandekar, Kris Myny, Wim Dehaene. 407-410 [doi]
• Extreme Temperature Characterization of Amplifier Response up to 300 Degrees Celsius Using Integrated Heaters and On-chip SamplersHanzhao Yu, Gyusung Park, Chris H. Kim. 411-414 [doi]
• A 272-GHz CMOS Analog BPSK/QPSK Demodulator for IEEE 802.15.3dSangyeop Lee, Shinsuke Hara, Ruibing Dong, Kyoya Takano, Shuhei Amakawa, Takeshi Yoshida, Minoru Fujishima. 415-418 [doi]
• A 400-µW Low-IF IoT Receiver Front-End with Tunable Charge-Sharing Complex FilterJin Jin, Jianhui Wu, Rinaldo Castello, Danilo Manstretta. 419-422 [doi]
• Body-Coupled Power Transceiver with Node-Specific Body-Area PoweringYilong Dong, Jiamin Li, Longyang Lin, Tao Tang, Jeong Hoan Park, Kian Ann Ng, Miaolin Zhang, Lian Zhang, Joanne Si Ying Tan, Jerald Yoo. 423-426 [doi]
• Dual-band Transceiver with Mutually-coupled On-chip Antennas for Implantable/Wearable DevicesNilan Udayanga, Manuel Monge. 427-430 [doi]
• th-Order Filter Based on Tunable N-Path FiltersLoai G. Salem. 431-434 [doi]
• A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOSYan Zhang, Chia-Jen Liang, Christopher Chen, Andrew Liu, Jason Woo, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang. 435-438 [doi]
• Experimental Verification of Wandering Spur Suppression Technique in a 4.9 GHz Fractional-N Frequency SynthesizerDawei Mai, Yann Donnelly, Michael Peter Kennedy, Stefano Tulisi, James Breslin, Patrick Griffin, Michael Connor, Stephen Brookes, Brian Shelly, Michael Keaveney. 439-442 [doi]
• An Ultra-Low Power K band Balanced Frequency Doubler with a Novel Current-reused StructureYue Gong, Jiangbo Chen, Likang Du, Huiyan Gao, Jiabing Liu, Shengjie Wang, Huan Li, Chunyi Song, Zhiwei Xu 0003. 443-446 [doi]
• A 213 GHz 2 dBm Output-Power Frequency Quadrupler with 45 dB Harmonic Suppression in 130 nm SiGe BiCMOSLuca Steinweg, Paolo Valerio Testa, Corrado Carta, Frank Ellinger. 447-450 [doi]
• A Broadband 110-170 GHz Frequency Multiplier by 4 Chain with 8 dBm Output Power in 130 nm BiCMOSAlper Karakuzulu, Mohamed Hussein Eissa, Dietmar Kissinger, Andrea Malignaggi. 451-454 [doi]
• A Near-Instantaneous and Non-Invasive Erasure Design Technique to Protect Sensitive Data Stored in Secure SRAMsJ.-P. Noel, M. Pezzin, Jean-Frédéric Christmann, Lorenzo Ciampolini, M. Le Coadou, M. Diallo, F. Lepin, B. Blampey, Simone Bacles-Min, R. Wacquez, Bastien Giraud. 455-458 [doi]
• A Low-Voltage 6T Dual-Port Configured SRAM with Wordline Boost in 28 nm FD-SOIMasoud Nouripayam, Joachim Rodrigues, Xiao Luo, Tom Johansson, Babak Mohammadi. 459-462 [doi]
• A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power CharacteristicsHojun Yoon, Wonjoo Jung, Jaewoo Park, Jindo Byun, Hyungmin Jin, Hyunyoon Cho, Youngmin Kim, Baek-Jin Lim, Young-Chul Cho, Youngdon Choi, Jung Hwan Choi, Hyungjong Ko, Changsik Yoo, Sang Hyun Lee. 463-466 [doi]
• An Optimized Low-Power Band-Tuning TX for Short-Range FMCW Radar in 22-nm FDSOI CMOSSammy Cerida Rengifo, Francesco Chicco, Erwan Le Roux, Christian C. Enz. 467-470 [doi]
• A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOSAnirudh Kankuppe, Sehoon Park, Kristof Vaesen, Dae-Woong Park, Barend van Liempd, Piet Wambacq, Jan Craninckx. 471-474 [doi]
• 0.37-pJ/b/dB PAM-4 Transmitter and Adaptive Receiver with Fixed Data and Threshold Levels for 12-m Automotive Camera LinkWoonghee Lee, Minkyo Shim, Yunhee Lee, Heejin Yang, Han-Gon Ko, Woo-seok Choi, Deog Kyoon Jeong. 475-478 [doi]
• A PAM4 Dielectric Waveguide Link in 28 nm CMOSKristof Dens, Joren Vaes, Simon Ooms, Martin Wagner, Patrick Reynaert. 479-482 [doi]
• 200-GS/s ADC Front-End Employing 25% Duty Cycle Quadrature Clock GeneratorNaftali Weiss, Gregory Cooke, Peter Schvan, Pascal Chevalier 0002, Andreia Cathelin, Sorin P. Voinigescu. 483-486 [doi]
• A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic LatencyJian Luan 0002, DanYu Wu, Xuqiang Zheng, Chen Cai, Linzhen Wu, Lei Zhou, Jin Wu, Xinyu Liu. 487-490 [doi]
• A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOSC. Zhang, Lucien J. Breems, Q. Liu, Georgi I. Radulov, Muhammed Bolatkale, Shagun Bajoria, R. Rutten, Arthur H. M. van Roermund. 491-494 [doi]
• A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element SwitchingChengyu Huang, Yushen Fu, Zekun Yang, Yang Liu, Nan Sun, Xueqing Li, Huazhong Yang. 495-498 [doi]
• 2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing CalibrationZheng Sun, Dingxin Xu, Junjun Qiu, Zezheng Liu, Yuncheng Zhang, Hongye Huang, Hanli Liu, Bangan Liu, Zheng Li, Jian Pang, Atsushi Shirane, Kenichi Okada. 499-502 [doi]
• A Highly Efficient Combo Transceiver for 802.11b/g/n/ax and BT/BLE in 22nm CMOSChao Lu, Yi Zhao, Jian Bao, Shr-Lung Chen, Jun Liu, Chin-Ming Chien, Leo Huang, Dingding Zhang, Yong Zhou, Jianqiu Chen, Jinqiang Zhao, Pengfei Yue, Yining Li. 503-506 [doi]
• FDDAC-based Transmitter with 2 GHz Modulation Bandwidth and 8 Gbit/s Data RateOner Hanay, Erkan Bayram, Ahmed Hamed, Renato Negra. 507-510 [doi]
• TaNS-DDRF: A 160-MHz Bandwidth 6-GHz Carrier Frequency Digital-Direct RF Transmitter for Wi-Fi 6E with Targeted Noise-ShapingBoyi Zheng, Lu Jie, Michael P. Flynn. 511-514 [doi]
• Low-Power Techniques for Wireline SystemsBehzad Razavi. 515-522 [doi]
• A 112Gb/s PAM-4, 168Gb/s PAM-8 7bit DAC-Based Transmitter in 7nm FinFETEuhan Chong, Faisal Ahmed Musa, Ahmed N. Mustafa, Tim Gao, Peter Krotnev, Rashid Soreefan, Qian Xin, Paul Madeira, Davide Tonietto. 523-526 [doi]
• A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOSChen Cai, Xuqiang Zheng, Yong Chen, DanYu Wu, Jian Luan 0002, Lei Zhou, Jin Wu, Xinyu Liu. 527-530 [doi]