AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs

Pengfei Xu 0011, Xiaofan Zhang, Cong Hao, Yang Zhao, Yongan Zhang, Yue Wang, Chaojian Li, Zetong Guan, Deming Chen, Yingyan Lin. AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs. In Stephen Neuendorffer, Lesley Shannon, editors, FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020. pages 40-50, ACM, 2020. [doi]

@inproceedings{0011ZHZZWLGCL20,
  title = {AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs},
  author = {Pengfei Xu 0011 and Xiaofan Zhang and Cong Hao and Yang Zhao and Yongan Zhang and Yue Wang and Chaojian Li and Zetong Guan and Deming Chen and Yingyan Lin},
  year = {2020},
  doi = {10.1145/3373087.3375306},
  url = {https://doi.org/10.1145/3373087.3375306},
  researchr = {https://researchr.org/publication/0011ZHZZWLGCL20},
  cites = {0},
  citedby = {0},
  pages = {40-50},
  booktitle = {FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020},
  editor = {Stephen Neuendorffer and Lesley Shannon},
  publisher = {ACM},
  isbn = {978-1-4503-7099-8},
}