Routing Congestion in VLSI Circuits - Estimation and Optimization

Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. Routing Congestion in VLSI Circuits - Estimation and Optimization. Series on integrated circuits and systems, Springer, 2007. [doi]

Authors

Prashant Saxena

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Rupesh S. Shelar

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Sachin S. Sapatnekar

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