Routing Congestion in VLSI Circuits - Estimation and Optimization

Prashant Saxena, Rupesh S. Shelar, Sachin S. Sapatnekar. Routing Congestion in VLSI Circuits - Estimation and Optimization. Series on integrated circuits and systems, Springer, 2007. [doi]

@book{0029057,
  title = {Routing Congestion in VLSI Circuits - Estimation and Optimization},
  author = {Prashant Saxena and Rupesh S. Shelar and Sachin S. Sapatnekar},
  year = {2007},
  doi = {10.1007/0-387-48550-3},
  url = {http://dx.doi.org/10.1007/0-387-48550-3},
  researchr = {https://researchr.org/publication/0029057},
  cites = {0},
  citedby = {0},
  series = {Series on integrated circuits and systems},
  publisher = {Springer},
  isbn = {978-0-387-30037-5},
}