A High-Performance Low Complexity All-Digital Fractional Clock Multiplier

Nahla T. Abou-El-Kheir, Ralph D. Mason, Mingze Li, Mustapha C. E. Yagoub. A High-Performance Low Complexity All-Digital Fractional Clock Multiplier. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019. pages 73-76, IEEE, 2019. [doi]

@inproceedings{Abou-El-KheirML19,
  title = {A High-Performance Low Complexity All-Digital Fractional Clock Multiplier},
  author = {Nahla T. Abou-El-Kheir and Ralph D. Mason and Mingze Li and Mustapha C. E. Yagoub},
  year = {2019},
  doi = {10.1109/A-SSCC47793.2019.9056905},
  url = {https://doi.org/10.1109/A-SSCC47793.2019.9056905},
  researchr = {https://researchr.org/publication/Abou-El-KheirML19},
  cites = {0},
  citedby = {0},
  pages = {73-76},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2019, Macau, SAR, China, November 4-6, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-5106-9},
}