Performance analysis of cosimulating processor core in VHDL and SystemC

Syed Saif Abrar, Maksim Jenihhin, Jaan Raik, Shyam Kiran A., C. Babu. Performance analysis of cosimulating processor core in VHDL and SystemC. In International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013. pages 563-568, IEEE, 2013. [doi]

@inproceedings{AbrarJRAB13,
  title = {Performance analysis of cosimulating processor core in VHDL and SystemC},
  author = {Syed Saif Abrar and Maksim Jenihhin and Jaan Raik and Shyam Kiran A. and C. Babu},
  year = {2013},
  doi = {10.1109/ICACCI.2013.6637234},
  url = {http://dx.doi.org/10.1109/ICACCI.2013.6637234},
  researchr = {https://researchr.org/publication/AbrarJRAB13},
  cites = {0},
  citedby = {0},
  pages = {563-568},
  booktitle = {International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013},
  publisher = {IEEE},
  isbn = {978-1-4799-2432-5},
}