Hardware reduction methodology for 2-dimensional kurtotic fastica based on algorithmic analysis and architectural symmetry - researchr publication authors

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Amit Acharyya, Koushik Maharatna, Bashir M. Al-Hashimi. Hardware reduction methodology for 2-dimensional kurtotic fastica based on algorithmic analysis and architectural symmetry. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2009, October 7-9, 2009, Tampere, Finland. pages 69-74, IEEE, 2009. [doi]

This author has not been identified. Look up 'Amit Acharyya' in GoogleThis author has not been identified. Look up 'Koushik Maharatna' in GoogleThis author has not been identified. Look up 'Bashir M. Al-Hashimi' in Google

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