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Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing

Kostas Adaos, G. Ph. Alexiou, Nikos Kanopoulos. Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing. In 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999. pages 33-36, IEEE, 1999. [doi]

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Kostas Adaos

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G. Ph. Alexiou

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Nikos Kanopoulos

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