Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing

Kostas Adaos, G. Ph. Alexiou, Nikos Kanopoulos. Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing. In 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999. pages 33-36, IEEE, 1999. [doi]

@inproceedings{AdaosAK99,
  title = {Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing},
  author = {Kostas Adaos and G. Ph. Alexiou and Nikos Kanopoulos},
  year = {1999},
  doi = {10.1109/ICECS.1999.812217},
  url = {https://doi.org/10.1109/ICECS.1999.812217},
  researchr = {https://researchr.org/publication/AdaosAK99},
  cites = {0},
  citedby = {0},
  pages = {33-36},
  booktitle = {6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999},
  publisher = {IEEE},
  isbn = {0-7803-5682-9},
}