2 regular expression matching accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate CMOS

Amit Agarwal, Steven Hsu, Mark Anders, Sanu Mathew, Gregory K. Chen, Himanshu Kaul, Sudhir Satpathy, Ram Krishnamurthy. 2 regular expression matching accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate CMOS. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]

@inproceedings{AgarwalHAMCKSK16,
  title = {2 regular expression matching accelerator with aging-tolerant low-VMIN circuits in 14nm tri-gate CMOS},
  author = {Amit Agarwal and Steven Hsu and Mark Anders and Sanu Mathew and Gregory K. Chen and Himanshu Kaul and Sudhir Satpathy and Ram Krishnamurthy},
  year = {2016},
  doi = {10.1109/VLSIC.2016.7573514},
  url = {http://dx.doi.org/10.1109/VLSIC.2016.7573514},
  researchr = {https://researchr.org/publication/AgarwalHAMCKSK16},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-0635-9},
}