A bitline leakage compensation scheme for low-voltage SRAMs

Ken-ichi Agawa, Hiroyuki Hara, Toshinari Takayanagi, Tadahiro Kuroda. A bitline leakage compensation scheme for low-voltage SRAMs. J. Solid-State Circuits, 36(5):726-734, 2001. [doi]

@article{AgawaHTK01,
  title = {A bitline leakage compensation scheme for low-voltage SRAMs},
  author = {Ken-ichi Agawa and Hiroyuki Hara and Toshinari Takayanagi and Tadahiro Kuroda},
  year = {2001},
  doi = {10.1109/4.918909},
  url = {https://doi.org/10.1109/4.918909},
  researchr = {https://researchr.org/publication/AgawaHTK01},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {36},
  number = {5},
  pages = {726-734},
}