Reconfigurable digital sequential system on chip design with its analysis of various parameters & power reduction using dynamic partial reconfiguration

Navneet Agrawal, Mayuri Jain. Reconfigurable digital sequential system on chip design with its analysis of various parameters & power reduction using dynamic partial reconfiguration. In International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013. pages 1346-1351, IEEE, 2013. [doi]

Abstract

Abstract is missing.