Synthesis of resonant clock networks supporting dynamic voltage / frequency scaling

Seyong Ahn, Minseok Kang, Marios C. Papaefthymiou, Taewhan Kim. Synthesis of resonant clock networks supporting dynamic voltage / frequency scaling. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 484-489, IEEE, 2015. [doi]

Abstract

Abstract is missing.