Sheldon B. Akers Jr.. A diagrammatic approach to multi-level logic synthesis. In Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design, 11-13 November 1964, Princeton, New Jersey, USA. pages 165-173, IEEE, 1964.
@inproceedings{Akers64,
title = {A diagrammatic approach to multi-level logic synthesis},
author = {Sheldon B. Akers Jr.},
year = {1964},
tags = {logic, systematic-approach},
researchr = {https://researchr.org/publication/Akers64},
cites = {0},
citedby = {0},
pages = {165-173},
booktitle = {Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design, 11-13 November 1964, Princeton, New Jersey, USA},
publisher = {IEEE},
}