RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors

Cagdas Akturan, Margarida F. Jacome. RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors. In Jan Madsen, Jörg Henkel, Xiaobo Sharon Hu, editors, Proceedings of the Ninth International Symposium on Hardware/Software Codesign, CODES 2001, Copenhagen, Denmark, 2001. pages 67-72, ACM, 2001. [doi]

@inproceedings{AkturanJ01:0,
  title = {RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors},
  author = {Cagdas Akturan and Margarida F. Jacome},
  year = {2001},
  doi = {10.1145/371636.371681},
  url = {http://doi.acm.org/10.1145/371636.371681},
  tags = {embedded software},
  researchr = {https://researchr.org/publication/AkturanJ01%3A0},
  cites = {0},
  citedby = {0},
  pages = {67-72},
  booktitle = {Proceedings of the Ninth International Symposium on Hardware/Software Codesign, CODES 2001, Copenhagen, Denmark, 2001},
  editor = {Jan Madsen and Jörg Henkel and Xiaobo Sharon Hu},
  publisher = {ACM},
  isbn = {1-58113-364-2},
}