Jon Alfredsson, Snorre Aunet. Performance of CMOS and Floating-Gate Full-Adders Circuits at Subthreshold Power Supply. In Nadine Azémard, Lars J. Svensson, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings. Volume 4644 of Lecture Notes in Computer Science, pages 536-545, Springer, 2007. [doi]
Abstract is missing.