A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration - researchr publication authors

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Ahmed M. A. Ali, Ahmed Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Mike Hensley, Russell Stop, Paritosh Bhoraskar, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed. A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration. In IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010. pages 292-293, IEEE, 2010. [doi]

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