A Fast Locking Ring Oscillator Based Fractional-N DPLL With an Assistance From a LUT-Based FSM

Zeeshan Ali, Pallavi Paliwal, Rupesh Lad, Dhanraj Bhukya, Shalabh Gupta. A Fast Locking Ring Oscillator Based Fractional-N DPLL With an Assistance From a LUT-Based FSM. In IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022. pages 2745-2749, IEEE, 2022. [doi]

@inproceedings{AliPLBG22,
  title = {A Fast Locking Ring Oscillator Based Fractional-N DPLL With an Assistance From a LUT-Based FSM},
  author = {Zeeshan Ali and Pallavi Paliwal and Rupesh Lad and Dhanraj Bhukya and Shalabh Gupta},
  year = {2022},
  doi = {10.1109/ISCAS48785.2022.9937479},
  url = {https://doi.org/10.1109/ISCAS48785.2022.9937479},
  researchr = {https://researchr.org/publication/AliPLBG22},
  cites = {0},
  citedby = {0},
  pages = {2745-2749},
  booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022},
  publisher = {IEEE},
  isbn = {978-1-6654-8485-5},
}