Sajjad Ali, Muhammad Abdul Basit Ur Rahim, Fahim Arif. Formal verification of internal block diagram of SysML for modeling real-time system. In 16th IEEE/ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, SNPD 2015, Takamatsu, Japan, June 1-3, 2015. pages 617-622, IEEE, 2015. [doi]
Abstract is missing.