Hananeh Aliee, Hamid R. Zarandi. A Fault-Tolerant, Dynamically Scheduled Pipeline Structure for Chip Multiprocessors. In Francesco Flammini, Sandro Bologna, Valeria Vittorini, editors, Computer Safety, Reliability, and Security - 30th International Conference, SAFECOMP 2011, Naples, Italy, September 19-22, 2011. Proceedings. Volume 6894 of Lecture Notes in Computer Science, pages 324-337, Springer, 2011. [doi]
@inproceedings{AlieeZ11, title = {A Fault-Tolerant, Dynamically Scheduled Pipeline Structure for Chip Multiprocessors}, author = {Hananeh Aliee and Hamid R. Zarandi}, year = {2011}, doi = {10.1007/978-3-642-24270-0_24}, url = {http://dx.doi.org/10.1007/978-3-642-24270-0_24}, researchr = {https://researchr.org/publication/AlieeZ11}, cites = {0}, citedby = {0}, pages = {324-337}, booktitle = {Computer Safety, Reliability, and Security - 30th International Conference, SAFECOMP 2011, Naples, Italy, September 19-22, 2011. Proceedings}, editor = {Francesco Flammini and Sandro Bologna and Valeria Vittorini}, volume = {6894}, series = {Lecture Notes in Computer Science}, publisher = {Springer}, isbn = {978-3-642-24269-4}, }