A novel high performance distributed arithmetic adaptive filter implementation on an FPGA

Daniel J. Allred, Heejong Yoo, Venkatesh Krishnan, Walter Huang, David V. Anderson. A novel high performance distributed arithmetic adaptive filter implementation on an FPGA. In 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2004, Montreal, Quebec, Canada, May 17-21, 2004. pages 161-164, IEEE, 2004. [doi]

Authors

Daniel J. Allred

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Heejong Yoo

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Venkatesh Krishnan

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Walter Huang

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David V. Anderson

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