A novel high performance distributed arithmetic adaptive filter implementation on an FPGA

Daniel J. Allred, Heejong Yoo, Venkatesh Krishnan, Walter Huang, David V. Anderson. A novel high performance distributed arithmetic adaptive filter implementation on an FPGA. In 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2004, Montreal, Quebec, Canada, May 17-21, 2004. pages 161-164, IEEE, 2004. [doi]

@inproceedings{AllredYKHA04,
  title = {A novel high performance distributed arithmetic adaptive filter implementation on an FPGA},
  author = {Daniel J. Allred and Heejong Yoo and Venkatesh Krishnan and Walter Huang and David V. Anderson},
  year = {2004},
  doi = {10.1109/ICASSP.2004.1327072},
  url = {http://dx.doi.org/10.1109/ICASSP.2004.1327072},
  researchr = {https://researchr.org/publication/AllredYKHA04},
  cites = {0},
  citedby = {0},
  pages = {161-164},
  booktitle = {2004 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2004, Montreal, Quebec, Canada, May 17-21, 2004},
  publisher = {IEEE},
  isbn = {0-7803-8484-9},
}