Alexandru Amaricai, Sergiu Nimara, Oana Boncalo, Jiaoyan Chen, Emanuel M. Popovici. Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits. In 17th Euromicro Conference on Digital System Design, DSD 2014, Verona, Italy, August 27-29, 2014. pages 473-479, IEEE, 2014. [doi]
@inproceedings{AmaricaiNBCP14,
title = {Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits},
author = {Alexandru Amaricai and Sergiu Nimara and Oana Boncalo and Jiaoyan Chen and Emanuel M. Popovici},
year = {2014},
doi = {10.1109/DSD.2014.92},
url = {http://dx.doi.org/10.1109/DSD.2014.92},
researchr = {https://researchr.org/publication/AmaricaiNBCP14},
cites = {0},
citedby = {0},
pages = {473-479},
booktitle = {17th Euromicro Conference on Digital System Design, DSD 2014, Verona, Italy, August 27-29, 2014},
publisher = {IEEE},
}