Kapil Anand, Rajeev Barua. Instruction cache locking inside a binary rewriter. In Jörg Henkel, Sri Parameswaran, editors, Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009. pages 185-194, ACM, 2009. [doi]
@inproceedings{AnandB09,
title = {Instruction cache locking inside a binary rewriter},
author = {Kapil Anand and Rajeev Barua},
year = {2009},
doi = {10.1145/1629395.1629422},
url = {http://doi.acm.org/10.1145/1629395.1629422},
tags = {caching, graph-rewriting, rewriting},
researchr = {https://researchr.org/publication/AnandB09},
cites = {0},
citedby = {0},
pages = {185-194},
booktitle = {Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009},
editor = {Jörg Henkel and Sri Parameswaran},
publisher = {ACM},
}