A Low-Power Double-Tail fT-Doubler Comparator in 65-nm CMOS

A. Anand, Y. Qi, Hossein Miri Lavasani. A Low-Power Double-Tail fT-Doubler Comparator in 65-nm CMOS. In 64th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Lansing, MI, USA, August 9-11, 2021. pages 853-856, IEEE, 2021. [doi]

Abstract

Abstract is missing.