Simulation techniques for noise-analysis in the PLL design process

Jens Anders, Wolfgang Mathis. Simulation techniques for noise-analysis in the PLL design process. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

@inproceedings{AndersM06,
  title = {Simulation techniques for noise-analysis in the PLL design process},
  author = {Jens Anders and Wolfgang Mathis},
  year = {2006},
  doi = {10.1109/ISCAS.2006.1693522},
  url = {http://dx.doi.org/10.1109/ISCAS.2006.1693522},
  tags = {analysis, design},
  researchr = {https://researchr.org/publication/AndersM06},
  cites = {0},
  citedby = {0},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
  publisher = {IEEE},
}