Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor

Hisashige Ando, Ryuji Kan, Yoshiharu Tosaka, Keiji Takahisa, Kichiji Hatanaka. Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor. In The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2008, June 24-27, 2008, Anchorage, Alaska, USA, Proceedings. pages 62-69, IEEE Computer Society, 2008. [doi]

@inproceedings{AndoKTTH08,
  title = {Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor},
  author = {Hisashige Ando and Ryuji Kan and Yoshiharu Tosaka and Keiji Takahisa and Kichiji Hatanaka},
  year = {2008},
  doi = {10.1109/DSN.2008.4630071},
  url = {http://dx.doi.org/10.1109/DSN.2008.4630071},
  researchr = {https://researchr.org/publication/AndoKTTH08},
  cites = {0},
  citedby = {0},
  pages = {62-69},
  booktitle = {The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2008, June 24-27, 2008, Anchorage, Alaska, USA, Proceedings},
  publisher = {IEEE Computer Society},
}