Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor

Hisashige Ando, Ryuji Kan, Yoshiharu Tosaka, Keiji Takahisa, Kichiji Hatanaka. Validation of hardware error recovery mechanisms for the SPARC64 V microprocessor. In The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, DSN 2008, June 24-27, 2008, Anchorage, Alaska, USA, Proceedings. pages 62-69, IEEE Computer Society, 2008. [doi]

Abstract

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