FPGA Redundancy Configurations: An Automated Design Space Exploration

Jahanzeb Anwer, Marco Platzner, Sebastian Meisner. FPGA Redundancy Configurations: An Automated Design Space Exploration. In 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, Phoenix, AZ, USA, May 19-23, 2014. pages 275-280, IEEE, 2014. [doi]

Authors

Jahanzeb Anwer

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Marco Platzner

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Sebastian Meisner

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