A Single-Chip FPGA Implementation of Real-Time Adaptive Background Model

Kofi Appiah, Andrew Hunter. A Single-Chip FPGA Implementation of Real-Time Adaptive Background Model. In Gordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong, editors, Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, FPT 2005, 11-14 December 2005, Singagore. pages 95-102, IEEE, 2005.

@inproceedings{AppiahH05,
  title = {A Single-Chip FPGA Implementation of Real-Time Adaptive Background Model},
  author = {Kofi Appiah and Andrew Hunter},
  year = {2005},
  researchr = {https://researchr.org/publication/AppiahH05},
  cites = {0},
  citedby = {0},
  pages = {95-102},
  booktitle = {Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, FPT 2005, 11-14 December 2005, Singagore},
  editor = {Gordon J. Brebner and Samarjit Chakraborty and Weng-Fai Wong},
  publisher = {IEEE},
  isbn = {0-7803-9407-0},
}