Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory

Adrià Armejach, Azam Seyedi, J. Rubén Titos Gil, Ibrahim Hur, Adrián Cristal, Osman S. Unsal, Mateo Valero. Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory. In Lawrence Rauchwerger, Vivek Sarkar, editors, 2011 International Conference on Parallel Architectures and Compilation Techniques, PACT 2011, Galveston, TX, USA, October 10-14, 2011. pages 361-371, IEEE Computer Society, 2011. [doi]

Abstract

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