Luca Arnani, Pierre-Emmanuel Gaillardon, Giovanni De Micheli. Efficient arithmetic logic gates using double-gate silicon nanowire FETs. In IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013. pages 1-4, IEEE, 2013. [doi]
@inproceedings{ArnaniGM13,
title = {Efficient arithmetic logic gates using double-gate silicon nanowire FETs},
author = {Luca Arnani and Pierre-Emmanuel Gaillardon and Giovanni De Micheli},
year = {2013},
doi = {10.1109/NEWCAS.2013.6573572},
url = {http://dx.doi.org/10.1109/NEWCAS.2013.6573572},
researchr = {https://researchr.org/publication/ArnaniGM13},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013},
publisher = {IEEE},
isbn = {978-1-4799-0618-5},
}