Walid Atabany, Patrick Degenaar. Parallelism to reduce power consumption on FPGA spatiotemporal image processing. In International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA. pages 1476-1479, IEEE, 2008. [doi]
@inproceedings{AtabanyD08,
title = {Parallelism to reduce power consumption on FPGA spatiotemporal image processing},
author = {Walid Atabany and Patrick Degenaar},
year = {2008},
doi = {10.1109/ISCAS.2008.4541708},
url = {http://dx.doi.org/10.1109/ISCAS.2008.4541708},
tags = {power consumption},
researchr = {https://researchr.org/publication/AtabanyD08},
cites = {0},
citedby = {0},
pages = {1476-1479},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA},
publisher = {IEEE},
}