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Efficient Design of Bit-level Accelerator Architectures for the DEDR-RASF Remote Sensing Algorithm using Super-systolic Arrays

Alejandro Castillo Atoche, J. Estrada Lopez, R. Quijano Cetina, L. Rizo Dominguez. Efficient Design of Bit-level Accelerator Architectures for the DEDR-RASF Remote Sensing Algorithm using Super-systolic Arrays. In César Benavente-Peces, Falah H. Ali, Joaquim Filipe, editors, PECCS 2012 - Proceedings of the 2nd International Conference on Pervasive Embedded Computing and Communication Systems, Rome, Italy, 24-26 February, 2012. pages 327-333, SciTePress, 2012.

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