400 Gb/s Programmable Packet Parsing on a Single FPGA - researchr publication authors

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Michael Attig, Gordon J. Brebner. 400 Gb/s Programmable Packet Parsing on a Single FPGA. In 2011 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Brooklyn, NY, USA, October 3-4, 2011. pages 12-23, IEEE, 2011. [doi]

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