Mehmood-ur-Rehman Awan, Fred Harris, Peter Koch. Time and Power optimizations in FPGA-based architectures for polyphase channelizers. In Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers, ACSCC 2011, Pacific Grove, CA, USA, November 6-9, 2011. pages 914-918, IEEE, 2011. [doi]
@inproceedings{AwanHK11, title = {Time and Power optimizations in FPGA-based architectures for polyphase channelizers}, author = {Mehmood-ur-Rehman Awan and Fred Harris and Peter Koch}, year = {2011}, doi = {10.1109/ACSSC.2011.6190142}, url = {http://dx.doi.org/10.1109/ACSSC.2011.6190142}, researchr = {https://researchr.org/publication/AwanHK11}, cites = {0}, citedby = {0}, pages = {914-918}, booktitle = {Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers, ACSCC 2011, Pacific Grove, CA, USA, November 6-9, 2011}, publisher = {IEEE}, isbn = {978-1-4673-0321-7}, }